platforms/stm32f7: remove GEPRC UART diagnostic
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@@ -10,10 +10,6 @@ build = "build.rs"
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[lints]
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[lints]
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workspace = true
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workspace = true
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[features]
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firmware = []
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uart2-wire-test = ["firmware"]
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[dependencies]
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[dependencies]
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kaptan-board = { path = "../../libs/kaptan-board" }
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kaptan-board = { path = "../../libs/kaptan-board" }
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platform-stm32f7 = { path = "../../platforms/stm32f7" }
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platform-stm32f7 = { path = "../../platforms/stm32f7" }
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@@ -21,6 +17,5 @@ platform-stm32f7 = { path = "../../platforms/stm32f7" }
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[[bin]]
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[[bin]]
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name = "kaptan-geprc-f722-v2"
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name = "kaptan-geprc-f722-v2"
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path = "src/main.rs"
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path = "src/main.rs"
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required-features = ["firmware"]
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test = false
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test = false
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bench = false
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bench = false
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@@ -1,11 +1,6 @@
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#![no_std]
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#![no_std]
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#![no_main]
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#![no_main]
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#[cfg(not(feature = "uart2-wire-test"))]
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mod board;
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mod board;
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#[cfg(feature = "uart2-wire-test")]
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platform_stm32f7::geprc_uart2_wire_test!();
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#[cfg(not(feature = "uart2-wire-test"))]
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platform_stm32f7::flight_firmware!(board::GeprcF722V2);
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platform_stm32f7::flight_firmware!(board::GeprcF722V2);
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@@ -1,59 +0,0 @@
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//! Focused physical-route diagnostics for supported F722 boards.
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use super::peripherals::{Usart2Tx, configure_usart2_pins_pa2_pa3, select_pll216_profile};
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use cortex_m_rt as _;
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use panic_halt as _;
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use stm32f7::stm32f722;
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const UART2_CLOCK_HZ: u32 = 54_000_000;
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const UART2_BAUD: u32 = 115_200;
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const SQUARE_WAVE_BYTE: u8 = 0x55;
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const LED_TOGGLE_INTERVAL_BYTES: u16 = 11_520;
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/// Continuously transmits `0x55` on the GEP-F722-HD V2's T2 pad.
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///
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/// This intentionally initializes only the clock tree, PA2/PA3, and USART2.
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/// It does not enable RTIC, DMA, MAVLink, sensors, timers, or motor outputs.
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/// The PA13 blue LED also changes state roughly once per second, proving the
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/// test passed clock and UART initialization. A host at 115200 8N1 must
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/// receive a continuous sequence of `55` bytes.
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pub fn geprc_uart2_wire_test() -> ! {
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// SAFETY: this diagnostic installs the sole reset entry point and takes no
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// interrupt or RTIC path, so no other code can own these peripherals.
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let device = unsafe { stm32f722::Peripherals::steal() };
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select_pll216_profile(&device.RCC, &device.PWR, &device.FLASH)
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.expect("could not select F722 PLL216 clock profile");
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device
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.RCC
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.ahb1enr()
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.modify(|_, write| write.gpioaen().set_bit());
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configure_usart2_pins_pa2_pa3(&device.GPIOA);
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device
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.GPIOA
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.moder()
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.modify(|_, write| write.moder13().output());
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// The V2's blue LED is active low. Start it off so each following toggle
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// is visible; PA13 is otherwise unused by this standalone diagnostic.
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device.GPIOA.bsrr().write(|write| write.bs13().set_bit());
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let uart = Usart2Tx::new(&device.RCC, device.USART2, UART2_CLOCK_HZ, UART2_BAUD)
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.expect("could not initialize USART2");
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let mut bytes_since_led_toggle = 0;
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let mut led_is_on = false;
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loop {
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uart.write_blocking(SQUARE_WAVE_BYTE);
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bytes_since_led_toggle += 1;
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if bytes_since_led_toggle == LED_TOGGLE_INTERVAL_BYTES {
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bytes_since_led_toggle = 0;
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led_is_on = !led_is_on;
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device.GPIOA.bsrr().write(|write| {
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if led_is_on {
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write.br13().set_bit()
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} else {
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write.bs13().set_bit()
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}
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});
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}
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}
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}
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@@ -5,13 +5,9 @@
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//! meaning; the RTIC bindings, PAC names, DMA streams and synchronization are
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//! meaning; the RTIC bindings, PAC names, DMA streams and synchronization are
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//! intentionally contained here and in the macro template.
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//! intentionally contained here and in the macro template.
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#![cfg_attr(not(target_arch = "arm"), allow(dead_code, unused_imports))]
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mod board;
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mod board;
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mod clock;
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mod clock;
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mod data_channel;
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mod data_channel;
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#[cfg(target_arch = "arm")]
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mod diagnostics;
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mod firmware;
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mod firmware;
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mod interrupts;
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mod interrupts;
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mod peripherals;
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mod peripherals;
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@@ -43,14 +39,6 @@ pub(crate) use board::{
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F722InitResources, F722LidarState, F722MavlinkState, F722Mtf01, F722Mtf01Uart,
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F722InitResources, F722LidarState, F722MavlinkState, F722Mtf01, F722Mtf01Uart,
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F722ServiceTimer, imu_is_healthy, on_uart4_interrupt, process_imu, record_mavlink_completion,
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F722ServiceTimer, imu_is_healthy, on_uart4_interrupt, process_imu, record_mavlink_completion,
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};
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};
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#[cfg(target_arch = "arm")]
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pub use diagnostics::geprc_uart2_wire_test;
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#[cfg(not(target_arch = "arm"))]
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pub fn geprc_uart2_wire_test() -> ! {
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loop {
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core::hint::spin_loop();
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}
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}
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pub(crate) use interrupts::{
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pub(crate) use interrupts::{
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acknowledge_exti3, acknowledge_exti4, acknowledge_imu_rx_dma1, acknowledge_imu_rx_dma2,
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acknowledge_exti3, acknowledge_exti4, acknowledge_imu_rx_dma1, acknowledge_imu_rx_dma2,
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acknowledge_imu_spi1_error, acknowledge_imu_spi3_error, acknowledge_imu_tx_dma1,
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acknowledge_imu_spi1_error, acknowledge_imu_spi3_error, acknowledge_imu_tx_dma1,
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@@ -73,13 +61,11 @@ pub fn initialize(
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board::initialize(core, device, config, routes)
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board::initialize(core, device, config, routes)
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}
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}
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#[cfg(target_arch = "arm")]
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unsafe extern "Rust" {
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unsafe extern "Rust" {
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static KAPTAN_F722_BOARD_CONFIG: BoardConfig;
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static KAPTAN_F722_BOARD_CONFIG: BoardConfig;
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fn kaptan_f722_board_routes() -> Result<F722BoardRoutes, BoardError>;
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fn kaptan_f722_board_routes() -> Result<F722BoardRoutes, BoardError>;
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}
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}
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#[cfg(target_arch = "arm")]
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fn registered_config() -> BoardConfig {
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fn registered_config() -> BoardConfig {
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// SAFETY: `flight_firmware!` emits this immutable symbol exactly once in
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// SAFETY: `flight_firmware!` emits this immutable symbol exactly once in
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// the selected board binary. The platform reads it only during RTIC init,
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// the selected board binary. The platform reads it only during RTIC init,
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@@ -87,7 +73,6 @@ fn registered_config() -> BoardConfig {
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unsafe { KAPTAN_F722_BOARD_CONFIG }
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unsafe { KAPTAN_F722_BOARD_CONFIG }
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}
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}
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#[cfg(target_arch = "arm")]
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fn registered_routes() -> Result<F722BoardRoutes, BoardError> {
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fn registered_routes() -> Result<F722BoardRoutes, BoardError> {
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// SAFETY: `flight_firmware!` emits this function exactly once in the board
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// SAFETY: `flight_firmware!` emits this function exactly once in the board
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// binary. It only constructs a safe descriptor; it cannot touch PAC state
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// binary. It only constructs a safe descriptor; it cannot touch PAC state
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@@ -97,7 +82,6 @@ fn registered_routes() -> Result<F722BoardRoutes, BoardError> {
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// This is one source-level task graph. Its compile-time bindings are the
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// This is one source-level task graph. Its compile-time bindings are the
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// platform-owned finite interrupt superset, independent of the board crate.
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// platform-owned finite interrupt superset, independent of the board crate.
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#[cfg(target_arch = "arm")]
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firmware::f722_flight_application!(
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firmware::f722_flight_application!(
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crate::f722::registered_routes,
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crate::f722::registered_routes,
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crate::f722::registered_config
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crate::f722::registered_config
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@@ -85,20 +85,6 @@ impl Usart2Tx {
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self.peripheral.tdr().as_ptr() as u32
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self.peripheral.tdr().as_ptr() as u32
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}
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}
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/// Blocks until USART2 accepts one byte for transmission.
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///
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/// This is used by the platform's UART wire diagnostic. Flight data-channel traffic
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/// uses [`Usart2TxDma`](super::Usart2TxDma) instead.
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#[cfg(target_arch = "arm")]
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pub fn write_blocking(&self, byte: u8) {
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while !self.peripheral.isr().read().txe().is_not_full() {}
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self.peripheral.tdr().write(|write| {
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// SAFETY: `byte` is eight bits and therefore fits the USART's
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// documented nine-bit TDR data field.
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unsafe { write.tdr().bits(u16::from(byte)) }
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});
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}
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/// Acknowledges one USART2 receive interrupt without accessing TX state.
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/// Acknowledges one USART2 receive interrupt without accessing TX state.
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pub fn acknowledge_receive_interrupt() -> ReceiveInterrupt {
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pub fn acknowledge_receive_interrupt() -> ReceiveInterrupt {
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// SAFETY: the platform binds USART2 exactly once and this function touches
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// SAFETY: the platform binds USART2 exactly once and this function touches
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@@ -19,7 +19,6 @@ mod f722;
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/// Dependencies used only while the platform expands its private RTIC macro.
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/// Dependencies used only while the platform expands its private RTIC macro.
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/// They stay crate-private: board binaries never name them.
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/// They stay crate-private: board binaries never name them.
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#[cfg(target_arch = "arm")]
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pub(crate) mod __platform_internal {
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pub(crate) mod __platform_internal {
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pub(crate) use cortex_m as cm;
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pub(crate) use cortex_m as cm;
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pub(crate) use cortex_m_rt as cmrt;
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pub(crate) use cortex_m_rt as cmrt;
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@@ -31,15 +30,6 @@ pub(crate) mod __platform_internal {
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pub(crate) use stm32f7 as pac;
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pub(crate) use stm32f7 as pac;
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}
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}
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/// The isolated diagnostic macro expands an entry attribute in a board binary.
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/// Rust macro visibility requires this one dependency to be reachable; it is
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/// not a platform configuration or execution API.
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#[cfg(target_arch = "arm")]
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#[doc(hidden)]
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pub mod __macro_support {
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pub use cortex_m_rt;
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}
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/// Construction or validation failure for a declarative F722 board.
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/// Construction or validation failure for a declarative F722 board.
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#[derive(Clone, Copy, Debug, Eq, PartialEq)]
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#[derive(Clone, Copy, Debug, Eq, PartialEq)]
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pub enum BoardError {
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pub enum BoardError {
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@@ -430,26 +420,6 @@ macro_rules! flight_firmware {
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};
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};
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}
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}
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/// Installs the isolated GEPRC UART2 physical-route diagnostic image.
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///
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/// This diagnostic never installs the flight application. It remains a
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/// platform-owned image and is intentionally separate from board declarations.
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#[macro_export]
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macro_rules! geprc_uart2_wire_test {
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() => {
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#[$crate::__macro_support::cortex_m_rt::entry]
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fn main() -> ! {
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$crate::__private::geprc_uart2_wire_test()
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}
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};
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}
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/// Implementation support consumed only by the exported firmware macros.
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#[doc(hidden)]
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pub mod __private {
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pub use crate::f722::geprc_uart2_wire_test;
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}
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/// Link anchor for the platform-owned F722 RTIC application.
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/// Link anchor for the platform-owned F722 RTIC application.
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#[doc(hidden)]
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#[doc(hidden)]
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pub fn firmware_anchor() {}
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pub fn firmware_anchor() {}
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