platforms/stm32f7: remove GEPRC UART diagnostic

This commit is contained in:
Onur Özkan committed 2026-08-01 22:28:51 +03:00
1 parent 59b604fdba
commit 626b7a8b95
6 files changed
-129

No files matched your search

-5
View File
@@ -10,10 +10,6 @@ build = "build.rs"
[lints]
workspace = true
[features]
firmware = []
uart2-wire-test = ["firmware"]
[dependencies]
kaptan-board = { path = "../../libs/kaptan-board" }
platform-stm32f7 = { path = "../../platforms/stm32f7" }
@@ -21,6 +17,5 @@ platform-stm32f7 = { path = "../../platforms/stm32f7" }
[[bin]]
name = "kaptan-geprc-f722-v2"
path = "src/main.rs"
required-features = ["firmware"]
test = false
bench = false
-5
View File
@@ -1,11 +1,6 @@
#![no_std]
#![no_main]
#[cfg(not(feature = "uart2-wire-test"))]
mod board;
#[cfg(feature = "uart2-wire-test")]
platform_stm32f7::geprc_uart2_wire_test!();
#[cfg(not(feature = "uart2-wire-test"))]
platform_stm32f7::flight_firmware!(board::GeprcF722V2);
-59
View File
@@ -1,59 +0,0 @@
//! Focused physical-route diagnostics for supported F722 boards.
use super::peripherals::{Usart2Tx, configure_usart2_pins_pa2_pa3, select_pll216_profile};
use cortex_m_rt as _;
use panic_halt as _;
use stm32f7::stm32f722;
const UART2_CLOCK_HZ: u32 = 54_000_000;
const UART2_BAUD: u32 = 115_200;
const SQUARE_WAVE_BYTE: u8 = 0x55;
const LED_TOGGLE_INTERVAL_BYTES: u16 = 11_520;
/// Continuously transmits `0x55` on the GEP-F722-HD V2's T2 pad.
///
/// This intentionally initializes only the clock tree, PA2/PA3, and USART2.
/// It does not enable RTIC, DMA, MAVLink, sensors, timers, or motor outputs.
/// The PA13 blue LED also changes state roughly once per second, proving the
/// test passed clock and UART initialization. A host at 115200 8N1 must
/// receive a continuous sequence of `55` bytes.
pub fn geprc_uart2_wire_test() -> ! {
// SAFETY: this diagnostic installs the sole reset entry point and takes no
// interrupt or RTIC path, so no other code can own these peripherals.
let device = unsafe { stm32f722::Peripherals::steal() };
select_pll216_profile(&device.RCC, &device.PWR, &device.FLASH)
.expect("could not select F722 PLL216 clock profile");
device
.RCC
.ahb1enr()
.modify(|_, write| write.gpioaen().set_bit());
configure_usart2_pins_pa2_pa3(&device.GPIOA);
device
.GPIOA
.moder()
.modify(|_, write| write.moder13().output());
// The V2's blue LED is active low. Start it off so each following toggle
// is visible; PA13 is otherwise unused by this standalone diagnostic.
device.GPIOA.bsrr().write(|write| write.bs13().set_bit());
let uart = Usart2Tx::new(&device.RCC, device.USART2, UART2_CLOCK_HZ, UART2_BAUD)
.expect("could not initialize USART2");
let mut bytes_since_led_toggle = 0;
let mut led_is_on = false;
loop {
uart.write_blocking(SQUARE_WAVE_BYTE);
bytes_since_led_toggle += 1;
if bytes_since_led_toggle == LED_TOGGLE_INTERVAL_BYTES {
bytes_since_led_toggle = 0;
led_is_on = !led_is_on;
device.GPIOA.bsrr().write(|write| {
if led_is_on {
write.br13().set_bit()
} else {
write.bs13().set_bit()
}
});
}
}
}
-16
View File
@@ -5,13 +5,9 @@
//! meaning; the RTIC bindings, PAC names, DMA streams and synchronization are
//! intentionally contained here and in the macro template.
#![cfg_attr(not(target_arch = "arm"), allow(dead_code, unused_imports))]
mod board;
mod clock;
mod data_channel;
#[cfg(target_arch = "arm")]
mod diagnostics;
mod firmware;
mod interrupts;
mod peripherals;
@@ -43,14 +39,6 @@ pub(crate) use board::{
F722InitResources, F722LidarState, F722MavlinkState, F722Mtf01, F722Mtf01Uart,
F722ServiceTimer, imu_is_healthy, on_uart4_interrupt, process_imu, record_mavlink_completion,
};
#[cfg(target_arch = "arm")]
pub use diagnostics::geprc_uart2_wire_test;
#[cfg(not(target_arch = "arm"))]
pub fn geprc_uart2_wire_test() -> ! {
loop {
core::hint::spin_loop();
}
}
pub(crate) use interrupts::{
acknowledge_exti3, acknowledge_exti4, acknowledge_imu_rx_dma1, acknowledge_imu_rx_dma2,
acknowledge_imu_spi1_error, acknowledge_imu_spi3_error, acknowledge_imu_tx_dma1,
@@ -73,13 +61,11 @@ pub fn initialize(
board::initialize(core, device, config, routes)
}
#[cfg(target_arch = "arm")]
unsafe extern "Rust" {
static KAPTAN_F722_BOARD_CONFIG: BoardConfig;
fn kaptan_f722_board_routes() -> Result<F722BoardRoutes, BoardError>;
}
#[cfg(target_arch = "arm")]
fn registered_config() -> BoardConfig {
// SAFETY: `flight_firmware!` emits this immutable symbol exactly once in
// the selected board binary. The platform reads it only during RTIC init,
@@ -87,7 +73,6 @@ fn registered_config() -> BoardConfig {
unsafe { KAPTAN_F722_BOARD_CONFIG }
}
#[cfg(target_arch = "arm")]
fn registered_routes() -> Result<F722BoardRoutes, BoardError> {
// SAFETY: `flight_firmware!` emits this function exactly once in the board
// binary. It only constructs a safe descriptor; it cannot touch PAC state
@@ -97,7 +82,6 @@ fn registered_routes() -> Result<F722BoardRoutes, BoardError> {
// This is one source-level task graph. Its compile-time bindings are the
// platform-owned finite interrupt superset, independent of the board crate.
#[cfg(target_arch = "arm")]
firmware::f722_flight_application!(
crate::f722::registered_routes,
crate::f722::registered_config
@@ -85,20 +85,6 @@ impl Usart2Tx {
self.peripheral.tdr().as_ptr() as u32
}
/// Blocks until USART2 accepts one byte for transmission.
///
/// This is used by the platform's UART wire diagnostic. Flight data-channel traffic
/// uses [`Usart2TxDma`](super::Usart2TxDma) instead.
#[cfg(target_arch = "arm")]
pub fn write_blocking(&self, byte: u8) {
while !self.peripheral.isr().read().txe().is_not_full() {}
self.peripheral.tdr().write(|write| {
// SAFETY: `byte` is eight bits and therefore fits the USART's
// documented nine-bit TDR data field.
unsafe { write.tdr().bits(u16::from(byte)) }
});
}
/// Acknowledges one USART2 receive interrupt without accessing TX state.
pub fn acknowledge_receive_interrupt() -> ReceiveInterrupt {
// SAFETY: the platform binds USART2 exactly once and this function touches
-30
View File
@@ -19,7 +19,6 @@ mod f722;
/// Dependencies used only while the platform expands its private RTIC macro.
/// They stay crate-private: board binaries never name them.
#[cfg(target_arch = "arm")]
pub(crate) mod __platform_internal {
pub(crate) use cortex_m as cm;
pub(crate) use cortex_m_rt as cmrt;
@@ -31,15 +30,6 @@ pub(crate) mod __platform_internal {
pub(crate) use stm32f7 as pac;
}
/// The isolated diagnostic macro expands an entry attribute in a board binary.
/// Rust macro visibility requires this one dependency to be reachable; it is
/// not a platform configuration or execution API.
#[cfg(target_arch = "arm")]
#[doc(hidden)]
pub mod __macro_support {
pub use cortex_m_rt;
}
/// Construction or validation failure for a declarative F722 board.
#[derive(Clone, Copy, Debug, Eq, PartialEq)]
pub enum BoardError {
@@ -430,26 +420,6 @@ macro_rules! flight_firmware {
};
}
/// Installs the isolated GEPRC UART2 physical-route diagnostic image.
///
/// This diagnostic never installs the flight application. It remains a
/// platform-owned image and is intentionally separate from board declarations.
#[macro_export]
macro_rules! geprc_uart2_wire_test {
() => {
#[$crate::__macro_support::cortex_m_rt::entry]
fn main() -> ! {
$crate::__private::geprc_uart2_wire_test()
}
};
}
/// Implementation support consumed only by the exported firmware macros.
#[doc(hidden)]
pub mod __private {
pub use crate::f722::geprc_uart2_wire_test;
}
/// Link anchor for the platform-owned F722 RTIC application.
#[doc(hidden)]
pub fn firmware_anchor() {}