build(f722): centralize linker layout

firmware/boards/geprc-f722-v2/build.rs

@@ -1,9 +1,11 @@
 fn main() {
     println!("cargo:rerun-if-changed=build.rs");
-    println!("cargo:rerun-if-changed=memory.x");
-    println!("cargo:rustc-link-arg=-Tlink.x");
+    let layout = std::path::Path::new(&std::env::var("CARGO_MANIFEST_DIR").unwrap())
+        .join("../../platforms/stm32f7/link/f722");
     println!(
-        "cargo:rustc-link-search={}",
-        std::env::var("CARGO_MANIFEST_DIR").expect("Cargo must set CARGO_MANIFEST_DIR")
+        "cargo:rerun-if-changed={}",
+        layout.join("memory.x").display()
     );
+    println!("cargo:rustc-link-arg=-Tlink.x");
+    println!("cargo:rustc-link-search={}", layout.display());
 }

firmware/boards/geprc-f722-v2/memory.x

@@ -1,19 +0,0 @@
-MEMORY
-{
-  FLASH : ORIGIN = 0x08000000, LENGTH = 512K
-  /*
-  * STM32F722 RAM totals 256 KiB:
-  *  - DTCM:  64 KiB at 0x2000_0000
-  *  - SRAM1: 176 KiB at 0x2001_0000
-  *  - SRAM2: 16 KiB at 0x2003_C000
-  *
-  * SRAM1 and SRAM2 are contiguous and are both accessible by DMA1 and DMA2.
-  * They form one 192 KiB default RAM region from 0x2001_0000 through
-  * 0x2003_FFFF. DTCM is intentionally kept separate for a future explicit
-  * placement policy rather than mixing CPU-critical and general allocations.
-  *
-  * TODO: Utilize DTCM.
-  *
-  */
-  RAM : ORIGIN = 0x20010000, LENGTH = 192K
-}