refactor: move firmware workspace under firmware

firmware/platforms/stm32f7/src/f722/clock.rs

@@ -0,0 +1,27 @@
+//! STM32F722 Pll216 clock-source assembly.
+
+use super::peripherals::{DwtMicrosecondClock, select_pll216_profile};
+use kaptan_log::KaptanError;
+use stm32f7::stm32f722;
+
+/// Core frequency in whole megahertz after selecting the PLL216 board profile.
+const CORE_CLOCK_MHZ: u32 = 216;
+
+/// A failure while establishing the board's clock tree or monotonic clock.
+#[derive(Clone, Copy, Debug, Eq, PartialEq, KaptanError)]
+pub(crate) enum ClockInitializationError {
+    Profile,
+    Monotonic,
+}
+
+/// Selects the F722 Pll216 profile and starts its monotonic microsecond clock.
+pub(crate) fn initialize(
+    core: &mut cortex_m::Peripherals,
+    device: &stm32f722::Peripherals,
+) -> Result<DwtMicrosecondClock, ClockInitializationError> {
+    select_pll216_profile(&device.RCC, &device.PWR, &device.FLASH)
+        .map_err(|_| ClockInitializationError::Profile)?;
+    core.SCB.disable_dcache(&mut core.CPUID);
+    DwtMicrosecondClock::start::<CORE_CLOCK_MHZ>(&mut core.DCB, &mut core.DWT)
+        .map_err(|_| ClockInitializationError::Monotonic)
+}