60 lines
2.3 KiB
Rust
60 lines
2.3 KiB
Rust
//! Focused physical-route diagnostics for supported F722 boards.
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use super::peripherals::{Usart2Tx, configure_usart2_pins_pa2_pa3, select_pll216_profile};
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use cortex_m_rt as _;
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use panic_halt as _;
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use stm32f7::stm32f722;
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const UART2_CLOCK_HZ: u32 = 54_000_000;
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const UART2_BAUD: u32 = 115_200;
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const SQUARE_WAVE_BYTE: u8 = 0x55;
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const LED_TOGGLE_INTERVAL_BYTES: u16 = 11_520;
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/// Continuously transmits `0x55` on the GEP-F722-HD V2's T2 pad.
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///
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/// This intentionally initializes only the clock tree, PA2/PA3, and USART2.
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/// It does not enable RTIC, DMA, MAVLink, sensors, timers, or motor outputs.
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/// The PA13 blue LED also changes state roughly once per second, proving the
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/// test passed clock and UART initialization. A host at 115200 8N1 must
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/// receive a continuous sequence of `55` bytes.
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pub fn geprc_uart2_wire_test() -> ! {
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// SAFETY: this diagnostic installs the sole reset entry point and takes no
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// interrupt or RTIC path, so no other code can own these peripherals.
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let device = unsafe { stm32f722::Peripherals::steal() };
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select_pll216_profile(&device.RCC, &device.PWR, &device.FLASH)
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.expect("could not select F722 PLL216 clock profile");
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device
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.RCC
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.ahb1enr()
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.modify(|_, write| write.gpioaen().set_bit());
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configure_usart2_pins_pa2_pa3(&device.GPIOA);
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device
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.GPIOA
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.moder()
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.modify(|_, write| write.moder13().output());
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// The V2's blue LED is active low. Start it off so each following toggle
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// is visible; PA13 is otherwise unused by this standalone diagnostic.
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device.GPIOA.bsrr().write(|write| write.bs13().set_bit());
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let uart = Usart2Tx::new(&device.RCC, device.USART2, UART2_CLOCK_HZ, UART2_BAUD)
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.expect("could not initialize USART2");
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let mut bytes_since_led_toggle = 0;
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let mut led_is_on = false;
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loop {
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uart.write_blocking(SQUARE_WAVE_BYTE);
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bytes_since_led_toggle += 1;
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if bytes_since_led_toggle == LED_TOGGLE_INTERVAL_BYTES {
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bytes_since_led_toggle = 0;
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led_is_on = !led_is_on;
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device.GPIOA.bsrr().write(|write| {
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if led_is_on {
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write.br13().set_bit()
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} else {
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write.bs13().set_bit()
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}
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});
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}
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}
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}
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